1. Field of the Invention
This invention relates to a method and apparatus for correcting errors in encoded uncorrected data in a storage device using a multiple level error correction code (ECC) format, and more particularly to a method and apparatus wherein such errors are at least partially processed at the storage device during deferred mode operation in a synchronous environment, such as with Count-Key-Data (CKD) architecture, and error position information may be retained when operating in either on-the-fly mode or deferred mode.
2. Description of Background Art
It has heretofore been proposed, in conventional single level error correction systems, to pass uncorrected data to a storage director for error correction. Error pattern and error location information is decoded by software in the storage director, and there corrected by software.
In the copending application U.S. Ser. No. 781,449, filed Sept. 27, 1985 (now U.S. Pat. No. 4,706,250, granted Nov. 10, 1987) assigned to the assignee of the present invention, there is disclosed a two-level error correction code structure in an improved multi-byte error-correcting subsystem. Data is formatted on a disk track into a number of subblocks, each within a respective block. There are also two sets of three subblock check bytes. One set is associated with the even phases and the other with the odd phases, thus providing interleaved codewords. With this arrangement, the first level of correction (of subblock errors) is done on-the-fly at the storage device after being delayed one subblock, and the data is sent to the storage director for correction of any second level (block) errors. On-the-fly error correction thus has advantages, including the fact that the next field can be processed without loss of disk synchronization. However, this on-the-fly correction is suitable only for systems operating in an asynchronous environment. It is not as desirable for operating systems which require a synchronous environment (such as with the CKD format) because there is insufficient time to communicate the next operation and no assurance that errors will be corrected within the allowed gap. Also, when operating in on-the-fly mode, first level (subblock) corrected data is passed to the storage director, but no error pattern and location information is retained.
It has heretofore been proposed to implement error correction by use of software in deferred mode operation to decode and also correct single level errors, or to decode and correct first level errors in a multilevel ECC format. When this is done, processing time increases in direct proportion to the number of errors present in a block. Also, when error decoding and correction are implemented with software, and a multibit error crosses byte boundaries, it is not possible to determine whether the two bytes in error are adjacent until processing is completed, thus always requiring two correction cycles.
There is a need for an improved apparatus and method using a two-level code structure which more efficiently permits correction of multibyte errors in a synchronous or asynchronous operating system environment and permits retention of error pattern and location information whether operating in a deferred or on-the-fly mode.